In this final thesis, the second chapter is dedicated to the design and characteristics of a step-down DC-DC converter without galvanic isolation. After a brief explanation of the influence of parasitic components of the LC circuit on the operation of the converter, in the third chapter, the values of parasitic resistances of the capacitor and the choke are determined using experimental methods and calculations. The fourth chapter presents a simulation model in which the values of parasitic resistances that were experimentally determined in the third chapter are used. The fifth chapter analyzes the waveforms of the simulation model. In the first part, the parasitic resistances are set to zero, in the second part, the measured value is added to the parasitic resistance of the inductance, and in the third part of the fifth chapter, the parasitic resistances of both the choke and the capacitor are included. The corresponding waveforms are analyzed and compared in order to determine the influence of parasitic resistances on the operation of the converter under consideration.